Thought this might interest people here.

"If you came for readable code, sorry, branchless programming is
basically code golf with caffeine ...

"By rewriting conditional logic into arithmetic and bit operations, or
using CPU instructions like cmov, we let the CPU chew through code
without pausing to guess. It?s smoother, faster, and often more
deterministic, which is crucial in performance-critical or side-channel-resistant scenarios (looking at you, cryptography)."

https://sanixdk.xyz/blogs/the-weird-concept-of-branchless-programming

HN discussion:

https://news.ycombinator.com/item?id=45405750


Alexis.

--- PyGate Linux v1.0
* Origin: Dragon's Lair, PyGate NNTP<>Fido Gate (3:633/10)

On 2025-10-16 09:13:48 +0000, Alexis said:

Thought this might interest people here.

"If you came for readable code, sorry, branchless programming is
basically code golf with caffeine ...

"By rewriting conditional logic into arithmetic and bit operations, or
using CPU instructions like cmov, we let the CPU chew through code
without pausing to guess. It?s smoother, faster, and often more deterministic, which is crucial in performance-critical or side-channel-resistant scenarios (looking at you, cryptography)."

https://sanixdk.xyz/blogs/the-weird-concept-of-branchless-programming

HN discussion:

https://news.ycombinator.com/item?id=45405750

Alexis.

A program that is branchless may still have branches wnen translated.
Even soomething as simmple as

long i;
...
i++;

may have a branch in the machine code:

inc low part of i
if low part of i != 0 go to L
inc high part of i
L:

--
Mikko


--- PyGate Linux v1.0
* Origin: Dragon's Lair, PyGate NNTP<>Fido Gate (3:633/10)

On Thu, 16 Oct 2025 20:13:48 +1100, Alexis wrote:

"By rewriting conditional logic into arithmetic and bit operations, or
using CPU instructions like cmov, we let the CPU chew through code
without pausing to guess. It?s smoother, faster, and often more deterministic, which is crucial in performance-critical or side-channel-resistant scenarios (looking at you, cryptography)."

The original 32-bit ARM architecture (you know, the most popular CPU architecture in the world) had extra bits in the opcode to allow (nearly?) every instruction to be executed conditionally, without explicit
branching.

They gave up on this idea in the 64-bit version of ARM.

--- PyGate Linux v1.0
* Origin: Dragon's Lair, PyGate NNTP<>Fido Gate (3:633/10)

On Fri, 17 Oct 2025 07:06:48 -0000 (UTC)
Lawrence D?Oliveiro <ldo@nz.invalid> wrote:

On Thu, 16 Oct 2025 20:13:48 +1100, Alexis wrote:

"By rewriting conditional logic into arithmetic and bit operations,
or using CPU instructions like cmov, we let the CPU chew through
code without pausing to guess. It?s smoother, faster, and often

more

deterministic, which is crucial in performance-critical or side-channel-resistant scenarios (looking at you, cryptography)."

The original 32-bit ARM architecture (you know, the most popular CPU architecture in the world) had extra bits in the opcode to allow
(nearly?) every instruction to be executed conditionally, without
explicit branching.

They gave up on this idea in the 64-bit version of ARM.

They gave up on the idea much earlier, in Thumb2, the variant that
promoted ARM from claiming to be most popular CPU architecture in the
world to actulally being one.
In Thumb2 almost universal predicatio was substituted by conditional
execution via IT block.
In ARM64 IT blocks are goe, leaving rather conventional select
instruction as the main tool for branch avoidance.
But I would imagine thhat Thumb2-capable cores (Cortex-M) still outsell ARM64-capable cores by significant factor.
Still popular Cortex-A53 core and its successors (A55 and A510, but not
A520) support both Thumb2 (T32 in ARMv8 terminology) and ARM64
instruction sets. I would guess that in today's practice [on these
cores] T32 is used very rarely.



--- PyGate Linux v1.0
* Origin: Dragon's Lair, PyGate NNTP<>Fido Gate (3:633/10)